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 IRFP450
Data Sheet July 1999 File Number
2331.3
14A, 500V, 0.400 Ohm, N-Channel Power MOSFET
This N-Channel enhancement mode silicon gate power field effect transistor is an advanced power MOSFET designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17435.
Features
* 14A, 500V * rDS(ON) = 0.400 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards"
Ordering Information
PART NUMBER IRFP450 PACKAGE TO-247 BRAND IRFP450
Symbol
D
NOTE: When ordering, use the entire part number.
G
S
Packaging
JEDEC STYLE TO-247
SOURCE DRAIN GATE
DRAIN (TAB)
4-353
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRFP450
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRFP450 500 500 14 8.8 56 20 180 1.44 860 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured from the Contact Screw on Header Closer to Source and Gate Pins to Center of Die Measured from the Source Lead, 6.0mm (0.25in) from Header to Source Bonding Pad Modified MOSFET Symbol Showing the Internal Device Inductances
D LD G LS S
TEST CONDITIONS ID = 250A, VGS = 0V (Figure 10) VGS = VDS, ID = 250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = 20V ID = 7.9A, VGS = 10V (Figures 8, 9) VDS 50V, ID = 7.9A (Figure 12) VDD = 250V, ID 14A, VGS = 10V, RGS = 6.1, RL = 17.4 MOSFET Switching Times are Essentially Independent of Operating Temperature
MIN 500 2.0 14 9.3 -
TYP 0.3 13.8 16 45 68 41 82 12 42 2000 400 100 5.0
MAX 4.0 25 250 100 0.4 27 66 100 60 130 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Current On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
VGS = 10V, ID 14A, VDS = 0.8 x Rated BVDSS IG(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of OperatingTemperature
-
VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)
-
Internal Source Inductance
LS
-
12.5
-
nH
Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient
RJC RJA Free Air Operation
-
-
0.70 30
oC/W oC/W
4-354
IRFP450
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier
G D
MIN -
TYP -
MAX 14 56
UNITS A A
S
Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:
VSD trr QRR
TJ = 25oC, ISD = 14A, VGS = 0V (Figure 13) TJ = 150oC, ISD = 13A, dISD/dt = 100A/s TJ = 150oC, ISD = 13A, dISD/dt = 100A/s
-
1300 7.4
1.4 -
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by Max junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 50V, starting TJ = 25oC, L = 7.9mH, RG = 25, peak IAS = 14A.
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0
Unless Otherwise Specified
15
0.8 0.6 0.4 0.2 0
ID , DRAIN CURRENT (A)
12
9
6
3
0 0 50 100 150 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC) TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
1 ZJC, THERMAL IMPEDANCE 0.5 0.2 0.1 0.1 0.05 0.02 0.01 PDM
10-2
SINGLE PULSE
10-3 10-5
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 10-4 0.1 10-3 10-2 t1, RECTANGULAR PULSE DURATION (s) 1 10
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
4-355
IRFP450 Typical Performance Curves
103 OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 102 10s 10 100s 1ms 1 TJ = MAX RATED SINGLE PULSE 1 10 102 VDS, DRAIN TO SOURCE VOLTAGE (V) 10ms DC 103 0 ID, DRAIN CURRENT (A)
Unless Otherwise Specified
(Continued)
20 VGS = 10V VGS = 6.0V 16 VGS = 5.5V 12 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
8
VGS = 5.0V
4
VGS = 4.5V VGS = 4.0V 0 50 100 150 200 250 VDS , DRAIN TO SOURCE VOLTAGE (V)
0.1
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
20 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 16 VGS = 10V 12 VGS = 6.0V VGS = 5.5V ID, DRAIN CURRENT(A)
102 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V 10
1 TJ = 150oC 0.1 TJ = 25oC
8
VGS = 5.0V
4 VGS = 4.0V 0 0 3 6 9 12 15 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS = 4.5V
10-2 0 2 4 6 8 VGS , GATE TO SOURCE VOLTAGE (V) 10
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
10 rDS(ON), ON-STATE RESISTANCE (S) VGS = 10V VGS = 20V rDS(ON), NORMALIZED DRAIN TO SOURCE ON RESISTANCE 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0 10 30 40 50 20 ID , DRAIN CURRENT (A) 60 70 PULSE DURATION = 2s DUTY CYCLE = 0.5% MAX
3.0
2.4
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 7.9A
1.8
1.2
0.6
0
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
NOTE: Heating effect of 2s is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
4-356
IRFP450 Typical Performance Curves
rDS(ON), NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 ID = 250A 1.15 8000
Unless Otherwise Specified
(Continued)
10000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
1.05
C, CAPACITANCE (pF)
6000 CISS 4000 COSS 2000 CRSS
0.95
0.85
0.75
-40
0
40
80
120
160
0
TJ , JUNCTION TEMPERATURE (oC)
1
2
5 10 2 5 VDS, DRAIN TO SOURCE VOLTAGE (V)
102
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
20 gfs, TRANSCONDUCTANCE (S)
16
TJ = 25oC
ISD, SOURCE TO DRAIN CURRENT (A)
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V
102 PULSE DURATION = 80s 5 DUTY CYCLE = 0.5% MAX 2 10 5 2 1 5 2 0.1 0 0.5 1.0 1.5 2.0 VSD , SOURCE TO DRAIN VOLTAGE (V) 2.5
12
TJ = 150oC
8
TJ = 150oC
TJ = 25oC
4
0
0
4
8 12 ID , DRAIN CURRENT (A)
16
20
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
ID = 14A VDS = 400V VDS = 250V VDS = 100V
VGS, GATE TO SOURCE (V)
16
12
8
4
0
0
25
50
75
100
125
Qg, GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-357
IRFP450 Test Circuits and Waveforms
VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD
+
-
0V
IAS 0.01
0 tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL VDS
+
tOFF td(OFF) tf 90%
90%
RG DUT
-
VDD 0
10% 90%
10%
VGS VGS 0 10%
50% PULSE WIDTH
50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS (ISOLATED SUPPLY) VDD SAME TYPE AS DUT Qg(TOT) Qgd Qgs D VDS VGS
12V BATTERY
0.2F
50k 0.3F
G
DUT 0
IG(REF) 0 IG CURRENT SAMPLING RESISTOR
S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
4-358
IRFP450
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
4-359


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